[12457.011311] | | |- clock: clk_core current: rate 408000, volt = 912500, enable_dvfs = ENABLE [12457.011339] | | |- clk limit(enable):[126000000, 1920000000]; last set rate = 408000 [12457.011356] | | | |- freq = 126000, volt = 850000 [12457.011371] | | | |- freq = 216000, volt = 850000 [12457.011387] | | | |- freq = 408000, volt = 912500 [12457.011402] | | | |- freq = 600000, volt = 962500 [12457.011418] | | | |- freq = 816000, volt = 1062500 [12457.011433] | | | |- freq = 1008000, volt = 1125000 [12457.011449] | | | |- freq = 1200000, volt = 1200000 [12457.011464] | | | |- freq = 1416000, volt = 1275000 [12457.011480] | | | |- freq = 1608000, volt = 1387500 [12457.011496] | | | |- freq = 1800000, volt = 1400000 [12457.011513] | | | |- freq = 1920000, volt = 1425000 [12457.011531] | | |- clock: clk_core current: rate 408000, regu_mode = UNKNOWN, regu_mode_en = 0 [12457.011546] -------------DVFS TREE END------------
CPU 11 108 900 216 900 408 900 600 900 816 1000 1008 1050 1200 1100 1416 1200 1608 1350 1800 1400 1920 1425

Where are new SoC with ARM Cortex A-73 on at least 16nm FF node?