Thanks to Karel's help and config file I may be making some forward progress on my attempt to run my own kernel (at a snail's pace). I ordered one of these and now I can watch output from the early stages of the boot process. Pretty cool!
I have done the following:
(a) make mrproper
(b) copied Karel's x5_kk_kernel_met_spdif_passtrough_720p_defconfig to arch/arm/configs
(c) make x5_kk_kernel_met_spdif_passtrough_720p_defconfig
(d) make
(e) make kernel.img
I then flash the kernel.img and upon boot I get the following:
980301 Starting kernel...@0x60408000
[ 0.000000] Initializing cgroup subsys cpu
[ 0.000000] Linux version 3.0.36+ (davidw@megadude) (gcc version 4.6 20120106 (prerelease) (GCC) ) #1 SMP PREEMPT Sun Nov 9 15:27:45 PST 2014
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=10c5387d
[ 0.000000] CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine: RK30board
[ 0.000000] ddr size = 1024 M, set ion_reserve_size size to 125829120
[ 0.000000] memory reserve: Memory(base:0x98800000 size:120M) reserved for <ion>
[ 0.000000] memory reserve: Memory(base:0x97d00000 size:11M) reserved for <fb0 buf>
[ 0.000000] memory reserve: Memory(base:0x97500000 size:8M) reserved for <camera_ipp_mem>
[ 0.000000] memory reserve: Total reserved 139M
[ 0.000000] Memory policy: ECC disabled, Data cache writeback
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] CPU SRAM: copied sram code from c0c61000 to fef00010 - fef02308
[ 0.000000] CPU SRAM: copied sram data from c0c632f8 to fef02308 - fef02e20
[ 0.000000] sram_log: 2 ] = %[ M t9 1 m A ( Su{ H | %
[ 0.000000] can't get a available nume and deno
[ 0.000000] clk_frac_div can't get rate=49500000,uart0_frac_div
[ 0.000000] rk30_dvfs_init
[ 0.000000] L310 cache controller enabled
[ 0.000000] l2x0: 16 ways, CACHE_ID 0x4100c0c8, AUX_CTRL 0x76050001, Cache size: 524288 B
This is very similar to what I get when I just boot Karel's ROM kernel:
958420 Starting kernel...@0x60408000
[ 0.000000] Initializing cgroup subsys cpu
[ 0.000000] Linux version 3.0.36+ (karel@karel-VirtualBox) (gcc version 4.8.2 (Ubuntu/Linaro 4.8.2-16ubuntu4) ) #1 SMP PREEMPT Tue Jul 15 22:42:39 CEST 2014
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=10c5387d
[ 0.000000] CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine: RK30board
[ 0.000000] ddr size = 1024 M, set ion_reserve_size size to 125829120
[ 0.000000] memory reserve: Memory(base:0x98800000 size:120M) reserved for <ion>
[ 0.000000] memory reserve: Memory(base:0x97d00000 size:11M) reserved for <fb0 buf>
[ 0.000000] memory reserve: Memory(base:0x97500000 size:8M) reserved for <camera_ipp_mem>
[ 0.000000] memory reserve: Total reserved 139M
[ 0.000000] Memory policy: ECC disabled, Data cache writeback
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] CPU SRAM: copied sram code from c0c14000 to fef00010 - fef020a8
[ 0.000000] CPU SRAM: copied sram data from c0c16098 to fef020a8 - fef02bc0
[ 0.000000] sram_log: 2 : U = E[ M d= 1 m A ( SU I | %
[ 0.000000] can't get a available nume and deno
[ 0.000000] clk_frac_div can't get rate=49500000,uart0_frac_div
[ 0.000000] rk30_dvfs_init
[ 0.000000] L310 cache controller enabled
[ 0.000000] l2x0: 16 ways, CACHE_ID 0x4100c0c8, AUX_CTRL 0x76050001, Cache size: 524288 B
[ 0.000000] DDR DEBUG: version 1.00 20131106
[ 0.000000] DDR DEBUG: DDR3 Device
[ 0.000000] DDR DEBUG: Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Total Capability=1024MB
[ 0.000000] DDR DEBUG: init success!!! freq=396MHz
[ 0.000000] DDR DEBUG: DTONE=0x1, DTERR=0x0, DTIERR=0x0, DTPASS=0x4, DGSL=1 extra clock, DGPS=180
[ 0.000000] DDR DEBUG: DTONE=0x1, DTERR=0x0, DTIERR=0x0, DTPASS=0x4, DGSL=1 extra clock, DGPS=180
[ 0.000000] DDR DEBUG: DTONE=0x1, DTERR=0x0, DTIERR=0x0, DTPASS=0x3, DGSL=1 extra clock, DGPS=270
[ 0.000000] DDR DEBUG: DTONE=0x1, DTERR=0x0, DTIERR=0x0, DTPASS=0x4, DGSL=1 extra clock, DGPS=180
[ 0.000000] DDR DEBUG: ZERR=0, ZDONE=0, ZPD=0x0, ZPU=0x0, OPD=0x0, OPU=0x0
[ 0.000000] DDR DEBUG: DRV Pull-Up=0xb, DRV Pull-Dwn=0xb
[ 0.000000] DDR DEBUG: ODT Pull-Up=0x2, ODT Pull-Dwn=0x2
[ 0.000000] rk30_iomux_init
[ 0.000000] PERCPU: Embedded 7 pages/cpu @c1ed2000 s7040 r8192 d13440 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 224512
[ 0.000000] Kernel command line: console=ttyFIQ0 androidboot.console=ttyFIQ0 init=/init initrd=0x62000000,0x00150000 mtdparts=rk29xxnand:0x00002000@0x00002000(misc),0x 00006000@0x00004000(kernel),0x00006000@0x0000A000( boot),0x00010000@0x00010000(recovery),0x00020000@0 x00020000(backup),0x00040000@0x00040000(cache),0x0 1000000@0x00080000(userdata),0x00002000@0x01080000 (metadata),0x00002000@0x01082000(kpanic),0x0018000 0@0x01084000(system),-@0x01204000(user) bootver=2014-03-03#2.13 firmware_ver=4.4.2
[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
... and so on to a Android home screen as one would expect.
So what step am I missing? I note that Karel's kernel is compiled with gcc version 4.8.2 on Ubuntu while mine is with gcc version 4.6 20120106 (prerelease) and I am on Debian Wheezy. Could that be having an impact?
Achh. Nothing is easy. But much easier thanks to Karel's help and config file.
Comment